【論文閱讀】FULL-KV: Flexible and Ultra-Low-Latency In-Memory Key-Value Store System Design on CPU-FPGA
目錄 introduction 1.背景 2.our work architecture 1.單節點結構 2.多節點結構 implementation 1.KVSE 2.KVSM Parser and Packer 3.Hash Engine 4.C2H & H2C Controller 5.Segment Management 6.Synchronizer 7.Event Controller
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