LOCK Prefix (lock) Intel X86 IA-32 Assembly Language Reference Manual

LOCK Prefix (lock)

lock

Operationspa

LOCK# -> NEXT Instructioncode

Descriptionip

The LOCK # signal is asserted during execution of the instruction following the lock prefix. This signal can be used in a multiprocessor system to ensure exclusive use of shared memory while LOCK # is asserted. The bts instruction is the read-modify-write sequence used to implement test-and-run.ci

The lock prefix works only with the instructions listed here. If a lock prefix is used with any other instructions, an undefined opcode trap is generated.it

bt, bts, btr, btcio

m, r/imm table

xchgclass

r, m test

xchgsed

m, r 

add, or, adc, sbb, and, sub, xor

m, r/imm 

not, neg, inc, dec

 

 

Memory field alignment does not affect the integrity of lock.

If a different 80386 processor is concurrently executing an instruction that has a characteristic listed here, locked access is not guaranteed. The previous instruction:

  • Does not follow a lock prefix

  • Is not on the previous list of acceptable instructions

  • A memory operand specified has a partial overlap with the destination operand.

Example

 

lock
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