FIFO控制程序

FIFO讀寫控制 wire [8:0] rd_data_count; reg fifo_rd_en = 0; reg [8:0] FIFO_CNT = 0; always @(posedge clk_61p44m) begin if(FIFO_CNT==255) begin fifo_rd_en <= 1'b0; FIFO_CNT <= 0; end else if(fifo_rd_en) FIF

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