在FPGA的設計中,避免不了使用廠家的原語。zynq-7020是xilinx的7 series FPGA,參考《UG768-Xilinx 7 Series FPGA Libraries Guide for HDL Designs》查看相應的原語使ide
永指導ui
1、IOBUF的介紹
二、example code:spa
來自xilinx官網論壇設計
module abcd(
input clk,
inout io_data,
input t,
output reg ext_out,
input in_ext
);code
wire data_in;
reg data_out;orm
IOBUF #(
.DRIVE(12), // Specify the output drive strength
.IBUF_LOW_PWR("TRUE"), // Low Power - "TRUE", High Performance = "FALSE"
.IOSTANDARD("DEFAULT"), // Specify the I/O standard
.SLEW("SLOW") // Specify the output slew rate
) IOBUF_inst (
.O(data_in), // Buffer output
.IO(io_data), // Buffer inout port (connect directly to top-level port)
.I(data_out), // Buffer input
.T(t) // 3-state enable input, high=input, low=output
);blog
always @(posedge(clk))
begin
ext_out <= data_in;
data_out <= in_ext;
end
endmoduleci
綜合後:get
2、參考資料
一、https://forums.xilinx.com/xlnx/board/crawl_message?board.id=SYNTHBD&message.id=16841input
二、UG768-《Xilinx 7 Series FPGA Libraries Guide for HDL Designs》