ZYNQ編譯出現 Opt 31-67 A LUT2 cell in the design is missing a connection on input pin I0的問題
使用VIVADO編譯代碼時，其中一個IP報錯，錯誤類似爲 Implementation Opt Design [Opt 31-67] Problem: A LUT2 cell in the design is missing a connection on input pin I0, which is used by the LUT equation. This pin has either be
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