[轉帖]信號處理知識

http://www.cnblogs.com/woshitianma/ 博客有許多跟我專業有關的，值得參考。

天馬行空W   作想作的，作該作的——有思想就去實現！

verilog經常使用系統函數以及例子

來源：http://www.cnblogs.com/woshitianma/archive/2012/12/21/2828370.html

verilog經常使用系統函數以及例子

 

 

1.打開文件

　　integer file_id;

　　file_id = fopen("file_path/file_name");

2.寫入文件：$fmonitor,$fwrite,$fdisplay,$fstrobe

　　//$fmonitor只要有變化就一直記錄

　　$fmonitor(file_id, "%format_char", parameter);

　　$fmonitor(file_id, "%m: %t in1=%d o1=%h", $time, in1, o1);

//$fwrite須要觸發條件才記錄

　　$fwrite(file_id, "%format_char", parameter);

//$fdisplay須要觸發條件才記錄

　　$fdisplay(file_id, "%format_char", parameter);

$fstrobe();

3.讀取文件：$fread

　　integer file_id;

　　file_id = $fread("file_path/file_name", "r");

4.關閉文件：$fclose

　　$fclose(fjile_id);

5.由文件設定存儲器初值：$readmemh，$readmemb

　　$readmemh("file_name", memory_name"); //初始化數據爲十六進制

　　$readmemb("file_name", memory_name"); //初始化數據爲二進制

六、文件顯示：$monitor,$write，$display

　$display,$write用於輸出信息

　　$display("rvel = %h hex %d decimal",rvel,rvel);

　　$monitor($time, ,"rxd = %b txd = %b",rxd ,txd)

六、文件定位

　　$fseek，文件定位，能夠從任意點對文件進行操做；

　　$fscanf，對文件一行進行讀寫。

七、退出仿真器$finish

八、隨機數據產生：$random

 

  1 下面是一些常見的應用：
  2         1、讀寫文件
  3 `timescale 1 ns/1 ns
  4 module FileIO_tb;
  5 integer fp_r, fp_w, cnt;
  6 reg [7:0] reg1, reg2, reg3;
  7 initial begin
  8   fp_r = $fopen("data_in.txt", "r");
  9   fp_w = $fopen("data_out.txt", "w");
 10  
 11   while(!$feof(fp_r)) begin
 12     cnt = $fscanf(fp_r, "%d %d %d", reg1, reg2, reg3);
 13     $display("%d %d %d", reg1, reg2, reg3);
 14     $fwrite(fp_w, "%d %d %d\n", reg3, reg2, reg1);
 15   end
 16  
 17   $fclose(fp_r);
 18   $fclose(fp_w);
 19 end
 20 endmodule
 21            2、
 22 integer file, char;
 23 reg eof;
 24 initial begin
 25    file = $fopenr("myfile.txt");
 26    eof = 0;
 27    while (eof == 0) begin
 28        char = $fgetc(file);
 29        eof = $feof (file);
 30        $display ("%s", char); 
 31    end
 32 end
 33         3、文件處理定位
 34 `define SEEK_SET 0
 35 `define SEEK_CUR 1
 36 `define SEEK_END 2
 37 integer file, offset, position, r;
 38 r = $fseek(file, 0, `SEEK_SET);
 39 r = $fseek(file, 0, `SEEK_CUR);
 40 r = $fseek(file, 0, `SEEK_END);
 41 r = $fseek(file, position, `SEEK_SET);
 42     　　4、
 43 integer r, file, start, count;
 44 reg [15:0] mem[0:10], r16;
 45 r = $fread(file, mem[0], start, count);
 46 r = $fread(file, r16);
 47        　　5、
 48 integer file, position;
 49 position = $ftell(file);
 50            6、
 51 integer file, r, a, b;
 52 reg [80*8:1] string;
 53 file = $fopenw("output.log");
 54 r = $sformat(string, "Formatted %d %x", a, b);
 55 r = $sprintf(string, "Formatted %d %x", a, b);
 56 r = $fprintf(file, "Formatted %d %x", a, b);
 57        7、
 58 integer file, r;
 59 file = $fopenw("output.log");
 60 r = $fflush(file);
 61         8、
 62 // This is a pattern file - read_pattern.pat
 63 // time bin dec hex
 64 10: 001 1 1
 65 20.0: 010 20 020
 66 50.02: 111 5 FFF
 67 62.345: 100 4 DEADBEEF
 68 75.789: XXX 2 ZzZzZzZz
 69 `timescale 1ns / 10 ps
 70 `define EOF 32'hFFFF_FFFF
 71 `define NULL 0
 72 `define MAX_LINE_LENGTH 1000
 73 
 74 module read_pattern;
 75 integer file, c, r;
 76 reg [3:0] bin;
 77 reg [31:0] dec, hex;
 78 real real_time;
 79 reg [8*`MAX_LINE_LENGTH:0] line;
 80 
 81 initial
 82     begin : file_block
 83     $timeformat(-9, 3, "ns", 6);
 84     $display("time bin decimal hex");
 85     file = $fopenr("read_pattern.pat");
 86     if (file == `NULL) // If error opening file
 87         disable file_block; // Just quit
 88 
 89     c = $fgetc(file);
 90     while (c != `EOF)
 91         begin
 92        
 93         if (c == "/")
 94             r = $fgets(line, `MAX_LINE_LENGTH, file);
 95         else
 96             begin
 97             // Push the character back to the file then read the next time
 98             r = $ungetc(c, file);
 99             r = $fscanf(file," %f:\n", real_time);
100 
101             // Wait until the absolute time in the file, then read stimulus
102             if ($realtime > real_time)
103                 $display("Error - absolute time in file is out of order - %t",
104                         real_time);
105                 else
106                     #(real_time - $realtime)
107                         r = $fscanf(file," %b %d %h\n",bin,dec,hex);
108                 end // if c else
109             c = $fgetc(file);
110         end // while not EOF
111 
112     r = $fcloser(file);
113     end // initial
114 
115 // Display changes to the signals
116 always @(bin or dec or hex)
117     $display("%t %b %d %h", $realtime, bin, dec, hex);
118 
119 endmodule // read_pattern
120         9、自動比較輸出結果
121 `define EOF 32'hFFFF_FFFF
122 `define NULL 0
123 `define MAX_LINE_LENGTH 1000
124 module compare;
125 integer file, r;
126 reg a, b, expect, clock;
127 wire out;
128 reg [`MAX_LINE_LENGTH*8:1];
129 parameter cycle = 20;
130 
131 initial
132     begin : file_block
133     $display("Time Stim Expect Output");
134     clock = 0;
135 
136     file = $fopenr("compare.pat");
137     if (file == `NULL)
138         disable file_block;
139 
140     r = $fgets(line, MAX_LINE_LENGTH, file); // Skip comments
141     r = $fgets(line, MAX_LINE_LENGTH, file);
142 
143     while (!$feof(file))
144         begin
145         // Wait until rising clock, read stimulus
146         @(posedge clock)
147         r = $fscanf(file, " %b %b %b\n", a, b, expect);
148 
149         // Wait just before the end of cycle to do compare
150         #(cycle - 1)
151         $display("%d %b %b %b %b", $stime, a, b, expect, out);
152         $strobe_compare(expect, out);
153         end // while not EOF
154 
155     r = $fcloser(file);
156     $stop;
157     end // initial
158 
159 always #(cycle / 2) clock = !clock; // Clock generator
160 
161 and #4 (out, a, b); // Circuit under test
162 endmodule // compare
163         10、從文件中讀數據到mem（這個好像通常人用的最多了）
164 `define EOF 32'HFFFF_FFFF
165 `define MEM_SIZE 200_000
166 module load_mem;
167 integer file, i;
168 reg [7:0] mem[0:`MEM_SIZE];
169 reg [80*8:1] file_name;
170 initial    
171 begin    
172 file_name = "data.bin";    
173 file = $fopenr(file_name);    
174 i = $fread(file, mem[0]);    
175 $display("Loaded %0d entries \n", i);    
176 i = $fcloser(file);    
177 $stop;    
178 end endmodule // load_mem

 

MVI (Multimedia, Video, and Imaging) IP

來源：http://forums.xilinx.com/t5/Digital-Signal-Processing-IP-and/bd-p/DSP

來源：http://www.xilinx.com/esp/video/refdes_listing.htm 能夠下載參考實例

Deinterlacer, Video Scaler and Timing Controller

Real-Time Video Engine Targeted Reference Design

Reference Designs

Xilinx, Inc.

這個論壇很給力。

來源：https://avnetexpress.avnet.com/store/em/LogonForm?storeId=500201&catalogId=500201&URL=https://www.em.avnet.com/Support%20And%20Downloads/FMC_IMAGEON_Building_Video_Design_Tutorial_14_4_20130110.zip

 

video scaler IP -- vivado

來源：http://forums.xilinx.com/xlnx/board/crawl_message?board.id=DSP&message.id=3737

Video Scaler IP Core Problem when horizontal up-scale and vertical down-scale

Hi Everyone,

    Now I have problems about Video Scaler 7.01a in ISE 14.4 on spartan6 device. In most situations the scaler is working in the down-scale mode, and the output width and height are always less than the input width and height, and the scaler result is also correct. While in some situations such as convert 1024x768 to 1280x720, the horizontal direction is up scale while vertical direction is down scale, the scaler will work incorrectly and output image is uploaded in the attachment.

    While I also checked the scaler bit accurate C model, and the c model can handle YUV color format 1024x768 to 1280x720, and I need further work to check whether the c model can handle RGB color format 1024x768 to 1280x720. Mean while I'd like to know whether the problem is only related to scaler, not related to the C model

答案

I'm not completely sure what your design looks like, but the most common implemenation is to have a VDMA (Video Direct Memory Access) someplace after then Video Scaler.  This connects to memory, which typically runs at about 200MHz.  I would recommend that you just ty the core and output clocks to the 200MHz, reducing the number of clock domains in your design.

If you don't have this, then I would still recommend at least a 200MHz fixed core clock.  The reason is that when upscaing, the Video Scaler has to produce more data than it receives, and it needs time to do this.  And in addition there is some small amount of overhead for every line that has to be processed.  So for upscaling it is a good idea to give yourself some room and run the core clock slightly faster than the input clock.

Chris
Video Solutions Center: http://www.xilinx.com/support/answers/56851.htm

 

 

 

來源：http://wenku.baidu.com/view/bcda09c62cc58bd63186bdb3.html

數字濾波器要求輸入、輸出信號均爲數字信號。

 數字濾波器（Digital Filter）一般是指一個用有限精度算法實現的離散線性時不變系統。所以它具備線性時不變系統的全部特性。

幅頻響應表示信號經過該濾波器後各頻率成分的衰減狀況，而相頻響應反映各頻率成分經過濾波器後在時間上的延時狀況。

多相濾波是將信號按照必定的規則分組，即抽取。同時將濾波器的衝擊響應按照一樣的規則分組，將對應的組進行卷積，獲得一路的輸出信號，最後將多路的信號從新排列獲得輸出信號。即先進行抽取再進行濾波，同傳統的先濾波在抽取的濾波器比較多相濾波是一種很高效的濾波方式，由於傳統的濾波在最後抽取的時候會丟掉不少沒被抽取到但通過濾波的信號。同時多相濾波器每一路的運算量都大大減少，因此相對高效。

多相濾波過程式按照相位均勻劃分把數字濾波器的系統函數H(z)分解成若干個具備不一樣相位的組，造成多個分支，在分支上實現濾波。

採用多相濾波結構，可利用多個階數較低的濾波來實現本來階數較高的濾波，並且每一個分支濾波器處理的數據率僅爲原數據率的I/D，這爲工程上高速實時信號處理提供了實現途徑。

來源：http://blog.sina.com.cn/s/blog_5d70c9e30101aiyi.html

線性相位濾波器

　一、相位隨頻率變化的曲線。它表明各頻率份量在時間原點所具備的相位。

 

來源：http://zhidao.baidu.com/question/203285202.html?fr=qrl&index=0&qbl=topic_question_0&word=%B3%E9%CD%B7%20%CF%E0%CE%BB%20%C2%CB%B2%A8%C6%F7%CA%C7%CA%B2%C3%B4

濾波器的階數，就是指過濾諧波的次數，通常來說，一樣的濾波器，其階數越高，濾波效果就越好，可是，階數越高，成本也就越高，所以，選擇合適的階數是很是重要的。

在咱們描述一個濾波器時，會經過一組係數來肯定濾波器的性能，用MATLAB的FDATOOL設計濾波器時，實際上就是咱們設定參數，讓它產生一組係數來實現，描述這個濾波器的係數的個數就是濾波器的長度，咱們知道，濾波過程就是一個卷積過程，是讓信號序列和這一組係數去卷積，濾波後的長度按卷積時的長度計算就是（信號序列長度+濾波器長度-1），這裏講的濾波器長度就應該是濾波器的係數個數。

濾波器，每一級都保存了一個通過延時的輸入樣值，各級的輸入鏈接和輸出鏈接被稱爲抽頭。一個M 階的FIR 濾波器將有M+1個抽頭。