BIOS Architecture 學習筆記06 - PCI Basics and Bus Enumeration
each funciton will have it`s config registers PCI: 256 Byte config space PCIe: 4K Byte config space Type 0 Header: for end point device Type 1 Header: for bridge device Bus: 8bit, 0~255 Device: 5bit,
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相關文章
- 1. STM32學習筆記- Memory and Bus Architecture
- 2. BIOS Architecture 學習筆記09 - MCFG Table and MMCFG based PCIe config access
- 3. PCI Local Bus筆記
- 4. BIOS Architecture 學習筆記07 - Accessing PCIe Config Registers
- 5. BIOS Architecture 學習筆記02 - Legacy Region
- 6. BIOS Architecture 學習筆記01 - System Memory Map
- 7. BIOS Architecture 學習筆記05 Transaction flows and address decoding part 2
- 8. CLR via C# 3rd - 06 - Type and Member Basics
- 9. 【學習筆記】System Address Map Initialization in x86/x64 Architecture Part 1: PCI-Based Systems
- 10. BIOS Architecture 學習筆記08 - Sample program for accessing config registers