展訊平臺gpio配置

gpio寄存器的說明   示例參考最後   3.6 Control Register 3.6.1 IO_MUX_CENTRAL_PIN_RF Register Address Map Base address: 0x402A0000 Base address(Set Reg): 0x402A1000 Base address(Clear Reg): 0x402A2000   主要分爲PIN_CTR

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